Automatic

Etude des phénomènes de Réflexions, de Diaphonie et de Stabilité des alimentations sur les cartes à haute densité d'interconnexions

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Authors: Alexandre Amédéo

The study of Signal Integrity (SI) phenomena required the implementation of a specific test vehicle, conceived according to industrial constraints. The printed circuit board (PCB) that was manufactured is a complex environment based on high speed and high density interconnections (HDI), and which allows for the study of all SI phenomena. In the first part, the characteristic impedance variations due to both the manufacturing process and the HDI layout are studied. The impact of these miss-adaptations was then quantified. The crosstalk study then required the set-up of a simplified simulation model to validate the methodology used by Cadence's tool. Simulation was then compared with experimental results to study the tool's validity and to define the correct tool configuration to obtain simulations that are more representative of real signals. The last part is dedicated to the study of Power Integrity. The simulations results obtained using dedicated tools are compared with the measured results on Test Vehicle using VNA. The Power Distribution Network is characterized using impedance analysis in the frequency field. We studied the characterization of power plans, of capacitor models as well as the parasitic inductance introduced by capacitor's placement. Finally, a study was done to provide an efficient solution of decoupling capacitors placement while seeking to minimize their parasitic inductance.