Electronics

Dependence between drain current saturation level and short-circuit robustness of p-GaN HEMTs

Publié le - Microelectronics Reliability

Auteurs : Mohamed Lemine Dedew, Stéphane Lefebvre, Tien Anh Nguyen, T.L. Le, V. Rustichelli, J. Oliveira, M. Alam, F. Coccetti

This work presents an experimental investigation of drain current saturation (ID−SAT) effect on short-circuit (SC) robustness of 650 V normally-off gallium nitride (GaN) high electron mobility transistors (HEMTs). SC tests were performed at a drain-source voltage (VDS) of 400 V, varying parameters such as gate resistance (RG), on-state gate-source voltage (VGS), and parasitic source inductance (LS) on the device under test (DUT). As expected, variation on maximum of ID−SAT (ID−SAT-max) was observed by varying these parameters. In single shot destructive SCs, components demonstrated a very high robustness, withstanding SC durations of hundreds of microseconds. However, in repetitive SCs of very short durations, components proved extremely fragile, failing after only a few SC cycles, sometimes as few as two cycles. Results suggest that in repetitive SCs, the failure appears to result from a critical dissipated energy (ESC) being exceeded depending on several parameters. This critical ESC value also seems to depend on SC pulse width (tp). In one-shot destructive SCs, the cause of failure remains unclear, as no critical ESC or ID−SAT-max threshold was observed. However, it is important to note that, in destructive SCs, a correlation between ID−SAT-max and SC withstanding time (SCWT) has been identified.