Evaluation of multi-void and drain metallization thickness effects on the electro thermal behavior of Si MOSFET under forward bias conditions

Single and multi-voids position effects will be highlighted from an electrothermal viewpoint. Complementary numerical investigations will show that these effects are strongly dependent on the properties of the backside metallization of the MOSFET chip. The methodology based on a coupled analysis of electrothermal modeling and experiments that led to these conclusions will be detailed.